Heterogeneous System Challenges Grow

Semiconductor Engineering

How to make sure different kinds of processors will work in an SoC.

Ann Steffora Mutschler of Semiconductor Engineering has written an article on the challenges of heterogenous systems.

As more types of processors are added into SoCs—CPUs, GPUs, DSPs and accelerators, each running a different OS—there is a growing challenge to make sure these compute elements interact properly with their neighbors.

Adding to the problem is this mix of processors and accelerators varies widely between different markets and applications. In mobile there are CPUs, GPUs, video and crypto processors. In automotive, there may be additional vision processing accelerators. In networking and servers there are various packet processing and cryptography accelerators. Server applications traditionally have relied on general-purpose CPU, but the future brings more dedicated acceleration engines, which may be customized for specific applications and may be implemented using FPGAs.

While heterogeneous processing has been in use for some time, it is getting more complex. In 1989, Intel rolled out the 80487 math co-processor for its 80486 CPU. And in 2011, ARM introduced its power-saving heterogeneous big.LITTLE architecture. In between and since then, there has been a growing mix of CPUs and GPUs and many other types of accelerators.

“It’s common, for example, to offload common tasks to a dedicated hardware accelerator, for video compression, cryptographic acceleration and the like,” said …

To read the article, click here.

##

Hypervisors. Help Or Hindrance

Almost everything is a tradeoff and tipping the scales is usually influenced by the end product goals. Hypervisors have a few such parameters.

Brian Bailey is Technology Editor/EDA for Semiconductor Engineering and has written an interesting article related to Hypervisors.

Hypervisors are seeing an increased level of adoption, but do they help or hinder the development and verification process? The answer may depend on your perspective.

In the hardware world, system-level integration is rapidly becoming a roadblock in the development process. While each of the pieces may be known to work separately, as soon as they are put together, the interactions between them can create a number of problems. The industry is working to come up with some tools and methodologies that constrain this problem.

In the software world, they are taking a different approach. They are using a hypervisor to create well-defined interfaces between the individual software blocks, ensuring that one cannot disturb another. This enables applications to be built that are more robust, provide a significant increase in security, allow for staged development and enables the controlled intermixing of attributes of a real time environment, with a more flexible operating system environment such as Linux.

But this problem is multi-faceted, and what helps in one area can cause problems for another. Balancing all of them may depend on what you are attempting to create and the value you place on certain attributes of the development process. “Safety critical applications are becoming increasingly competitive, and there is always a push for more functionality in these systems,” says…

To read the article, click here.

##

Rethinking Verification For Cars

Semiconductor Engineering

First of two parts: How the car industry can improve reliability.

Ann Steffora Mutschler of Semiconductor Engineering has written an article on how to improve reliability in automotive.

As the amount of electronic content in a car increases, so does the number of questions about how to improve reliability of those systems.

Unlike an IoT device, which is expected last a couple of years, automotive electronics fall into a class of safety-critical devices. There are standards for verifying these devices, new test methodologies, and there is far more scrutiny about how all of this happens.

“We are moving from ADAS to autopilot, from autopilot to autonomous driving,” said…

To read the article, click here.

##

Will Hypervisors Protect Us

They may not be a silver bullet, but they are a good first step when it comes to securing cars and the Internet of Things. Problems start when people believe the job is complete.

Brian Bailey is Technology Editor/EDA for Semiconductor Engineering and has written a very informative article on issues related to Hypervisors.

Another day, another car hacked and another report of a data breach. The lack of security built into electronic systems has made them a playground for the criminal world, and the industry must start becoming more responsive by adding increasingly sophisticated layers of protection. In this, the first of a two-part series, Semiconductor Engineering examines how hypervisors are entering the embedded world.

Simon Davidmann, CEO of Imperas, frames the …

To read the article, click here.

##

Silicon Without Software is Just Sand by Amelia Dalton of EE Journal

Embedded Software Development with Virtual Platforms

Shifting Left with Imperas

No one builds a chip without simulation, right? In this week’s Fish Fry, Amelia Dalton of Electronic Engineering Journal takes a closer look at the value of virtual prototypes to simulate embedded software. Simon Davidmann (CEO – Imperas) and Amelia chat about about why Simon thinks no one should design embedded software without simulation, and the benefits of using virtual platforms to develop a verification and test environment.

 

Follow the link to listen to the interview / Fish Fry….

[Amelia's Fish Fry's are one-on-one audio interviews  / podcasts with industry experts / executives about topical issues and technologies.]

##

Grappling With Auto Security

Semiconductor Engineering

The search is on for a way to balance connectivity, performance and security.

Ann Steffora Mutschler of Semiconductor Engineering has written an interesting article on Security in automotive.

It’s a changed world under the hood of automobiles today, as vehicles become increasingly connected to infrastructure and each other. But that connectedness also is creating new security risks.

Growing complexity is one piece of the problem. There are upwards of 80 electronic control units (ECUs) and more than 100 million lines of code in an average vehicle. On top of that, there are more vehicles communicating. The number of cars on the road containing at least some level of interconnectivity will reach 100 million by 2025, according to Gartner.

But even with all of that sophistication, automobiles still operate with a series of non-secure controller area network (CAN) buses that are vulnerable to common software flaws, particularly when that vehicle is also connected to the cloud.

“It’s going to be one of those multi-faceted things,” observed …

To read the article, click here.

##

prpl Security Group and Imperas Address IoT Security Challenges via Multi-Domain Virtualization

As a member of the prpl Foundation and its security working group, Imperas is working with several member who are using OVP technologies to develop and explore the use of hypervisors to improve device security, amongst other things.

In this article on EBN online, concern over automotive security is discussed and a hypervisor from SELTECH is introduced.

car hijacked using security breach

As a founding member of the Security Working Group of the prpl Foundation, Imperas is supporting the definition of a new open security framework for deploying secured and authenticated virtualized services in the Internet of Things (IoT) and related emerging markets.

Recent news shows that security is a key challenge to the wide scope and deployment of IoT, with varied consequences across many IoT markets. Imagine automotive hijacking. Power grid failure. Financial security breaches. Health care hacking. Consequences are severe: successful security measures in the IoT ecosystem will…

To read the full article click here.

To visit prpl click here.

Automating System Design

The impact of the chip’s changing role in the system is becoming clearer.

Ann Steffora Mutschler of Semiconductor Engineering has written an interesting article on System Level design and its automation.

There are comments from Wally Rhines (chairman & CEO of Mentor), Simon Davidmann (president & CEO Imperas), Nandan Nayampally (VP marketing ARM), Nimish Modi (snr VP Cadence) and John Koeter (VP Synopsys).

Change is underway in the chip design world, creating opportunities and challenges that reach far beyond questions about whether Moore’s Law is slowing or stopping.

Never before in the history of semiconductors has design been so complex and sophisticated, and never has it touched so many lives in so many interesting ways. This is…

To read the article, click here.

##

ESL Flow Is Dead

Brian Bailey of Semiconductor Engineering recently chaired a panel at DVCon on ESL.

Expecting the future to replicate the past always leads to surprises and when it comes to migration of abstraction for semiconductor design, the future remains unclear.

Brian interviewed several industry leaders with experience in the field and provides interesting insights into why ESL took a long time to get where it has…

Simon Davidmann, CEO of Imperas was quoted several times. For example Simon said: “Everyone is trying to do more with RTL, more design, more verification, more complexity, and they needed a better solution. The industry came up with a C++ class language (SystemC) and then tried to look at what they could do with it. What is needed is to move away from the EDA vendors trying to define ways to sell the technologies they have, to asking the question, ‘How are we going to design systems which are incredibly complex, containing many processors, many hardware blocks and more software than you can imagine?’ How can we design things in a better way? How do we verify things in a better way?”…

To read the article, click here.

##