Bulls, Bears and Bunnies. The 6th RISC-V Workshop in Shanghai

embedded computing design

The 6th RISC-V Workshop was held May 8-11 in Shanghai.   RISC-V is, of course, the open-source processor architecture invented and introduced by the University of California, Berkeley in 2014. The previous workshop, held last November in Silicon Valley, attracted around 350 participants; this workshop about the same.

The opening statement of the Imperas presentation at the workshop was “The size of the RISC-V market share will depend more on the software ecosystem than on specifics of RISC-V implementations.”  The meat of the presentation focused on modern embedded software development methodology, specifically on Continuous Integration Continuous Test (CI / CT) subset of the Agile methodology.

To read the article, click here.

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New Imperas Virtual Platform Software Delivers Performance and Models for Automotive, IoT and Security

New Release Doubles Performance, Adds ARM, Imagination Technologies, RISC-V and Renesas Models, Features Virtual Prototype Modeling Tool

Oxford, United Kingdom, May 23, 2017 - Imperas Software Ltd., the leader in high-performance software simulation, today announced a new software release, focused on enhanced solutions across automotive, IoT, security and other markets, and extending Imperas’ leadership in virtual prototyping.

Highlights include:

  • 2x performance improvement in simulation, for fast virtual platform execution to help embedded software developers run more tests in less time.
  • New Open Virtual Platforms (OVP) models for ARM (ARMv8.1), Imagination Technologies (MIPS I6400), RISC-V (32 bit and 64 bit) and Renesas (RH850) processors, all popular and widely-adopted in these markets.
  • A new iGen modeling productivity tool, for accelerated peripheral and platform development and customization.

“The automotive, IoT and security markets are expanding rapidly, and deserve specific solutions to address them. Focus on performance, models, and productivity are critical areas of investment for Imperas, to help developers accelerate development and test and improve quality in the embedded software world,” said Simon Davidmann, president and CEO of Imperas.

Rick O’Connor, Executive Director, RISC-V Foundation commented: “Imperas virtual platforms and models for the open RISC-V architecture will enable early software development, long before hardware is available… lower software development costs, increase quality, improve time to market, and reduce software development risks.”

“We are delighted to be working with Imperas to deliver the fastest Instruction Accurate (IA) simulation solution for our many MIPS partners,” said Imagination Technologies. “We’ve been impressed how Imperas’ simulation technology significantly outperforms other commonly-used solutions. Faster simulation results in more tests being run, and therefore higher quality software being developed – and that’s good news for our extensive MIPS ecosystem community.” 

“The Imperas virtual platform environment is amazingly easy to use,” said Masaki Gondo, CTO of eSOL. “Starting with the RH850F1H EPK, we were able to get eMCOS running in our custom RH850 virtual platform in only 2 weeks.  Also, the simulation performance is even faster than real time.”

Art Swift, President of the prpl Foundation, commented, “We are all aware of the importance of security, especially in the IoT. Imperas, with their participation in the prpl Foundation, support for the prpl platform, and this new high-performance release, is making important contributions in this arena.”

“Virtual platforms are moving into the mainstream of embedded software flows.  Imperas tools and models lead the market (with) complete and comprehensive solutions,” said Shuzo Tanaka, Vice President of eSOL TRINITY.

Virtual platforms lower embedded software development costs, increase quality, improve time to market, and reduce the risks involved in software development for advanced electronic systems.  The new release and processor models are available now.

Imperas virtual prototyping solutions support over 170 processor models, including ARM, Altera, Synopsys (ARC), Imagination Technologies (MIPS), Renesas, RISC-V and Xilinx cores. For the latest list of Imperas models, please see www.OVPworld.org.  Follow Imperas on Linked In and twitter @ImperasSoftware.

About Imperas

For more information about Open Virtual Platforms and Imperas, please see www.ovpworld.org and www.imperas.com.

All trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.

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New Open Virtual Platforms Processor Models for ARM, Imagination Technologies, RISC-V and Renesas Accelerate Software Development

Latest OVP Models and Virtual Prototype Software Release with iGen, Available Now

Oxford, United Kingdom, May 23, 2017 - Imperas Software Ltd., the leader in high-performance software simulation, today announced the availability of new Open Virtual Platforms (OVP) models for ARM, Imagination Technologies, RISC-V and Renesas processors, along with a new OVPsim software release including the iGen modeling tool.

For embedded software and hardware developers, virtual platforms are increasingly important, especially for multi-core designs. These new OVP library models, for ARM’s ARMv8.1 architecture for the Cortex-A family, Imagination Technologies MIPS I6400, Renesas RH850, and RISC-V, extend Imperas’ leadership in virtual prototyping. OVP models, APIs and the OVPsim virtual platform simulator support development and customization of instruction-accurate platforms for SoCs and larger systems for software development, debug and test.

The Open Virtual Platforms (OVP) portal delivers free, open source models for virtual platforms, as well as OVPsim simulation, and now iGen modeling software. The resources on this portal can significantly accelerate development and test for the embedded software world. New in this OVPsim release is also the iGen productivity tool for peripheral and platform building. All of these processor models are available now.

Rick O’Connor, Executive Director, RISC-V Foundation commented: “Imperas, a member of the RISC-V Foundation, has developed and released open source models of the RISC-V RV32I and RV64I cores through the Open Virtual Platforms (OVP) website. These virtual platforms and models enable early software development, long before hardware is available, help lower software development costs, increase quality, improve time to market, and reduce software development risks.”

Fast Processor Models are available as well for the Renesas RH850 microcontroller (MCU) family, commonly used for automotive applications such as power train, braking system and body control. This expands Renesas model support, including previously-released Renesas processor families such as the V850, RL78 and M16C. A video demonstration of OVP Fast Processor models for the Renesas RH8503GM processor and OVPsim, with the Green Hills Software MULTI debugger, is available here.

“Imperas and OVP are proud to provide these new models, along with virtual platforms for embedded software and hardware development,” said Simon Davidmann, president and CEO of Imperas. “And, our new iGen solution significantly accelerates custom model and virtual platform development.”

Imperas virtual prototyping solutions support a wide variety of OVP models and virtual prototypes, including processor models of Altera, ARM (including Cortex-A, R and M families), Imagination Technologies (MIPS), PowerPC, Renesas, RISC-V, Synopsys (ARC) and Xilinx cores. The addition of these new models expands existing Imperas and Open Virtual Platforms (OVP) platform support to over 170 processor models across a wide variety of vendors. For the latest list of Imperas models, please see the OVP website models page.  And follow Imperas on Linked In and twitter @ImperasSoftware.

About Imperas

For more information about Open Virtual Platforms and Imperas, please see www.ovpworld.org and www.imperas.com.

All trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.

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