Imperas exhibit and demonstrate OVP at Embedded Technology show, Nov 14-16, Yokohama, Japan

Larry Lapides, Imperas vice president, exhibits at Japanese Embedded Systems Design show

Embedded Technology (ET) is the worlds largest  trade show and conference for embedded system designers and  managers.

The ET Conference & Exhibition introduces advanced technologies and solutions  for emerging embedded applications, including digital consumer electronics,  automotive, wireless/ubiquitous computing and factory automation.

Imperas has booth V-010 in the Venture Village area of the exhibit hall.

Imperas will demonstrate both OVP and Imperas tools, showing how virtual platform based technologies can provide benefits such as earlier software development (pre-silicon), and improved software testing (post-silicon).

To arrange meetings, please contact Hidemi Yokokawa, Imperas Japan representative.

Imperas and OVP to be demonstrated at ARM TechCon Oct 30-Nov-12, Silicon Valley

Simon Davidmann to present and Imperas demonstrate new OVP Fast Processor Models and Imperas Professional tools

ARM TechCon is the largest conference devoted to developers of ARM-based SoCs, software and systems, bringing together users, hardware and software vendors, ARM technologists and others in the ARM ecosystem.

Imperas at ARM Techcon:  Simon Davidmann will be presenting a paper, and Imperas will have a booth in the exhibits.

OS Porting and Analysis for Dual-Core ARM Cortex-A9 Based Systems, Simon Davidmann; Wednesday October 31 10:30am

Description: Whether Linux, RTOS, or a combination, the OS and its related software are much more difficult to port, boot, and analyze in a multicore system. Using an instruction-accurate virtual platform allows use of the actual OS kernel (not a debug version), provides console messages before the console is available on hardware, and provides additional visibility into the interaction of the operating system or systems with the hardware. For example, though booting Linux on a Cortex-A9 takes hundreds of millions of instructions, it takes just hundreds of processes. When OS-aware tools enable analysis at a higher level of abstraction than just instruction tracing, the result is much more efficient bring-up of an OS. Examples of SMP and AMP systems show how virtual platforms ease OS bring-up.

Takeaway: How to simulate software on the virtual platform. OS-aware tools for virtual platforms, including process and event tracing, and analysis of context switching and scheduling.

Booth demos will focus on CPU and OS aware tools for software verification, analysis and profiling, especially for multicore SoCs and multiprocessor systems.