This site provides information on the industry’s most comprehensive library of open source models of advanced processor cores that work in SystemC TLM2 environments.
You can download these models and use them in your own SystemC TLM2 platforms. They have been tested to run with all major SystemC simulators: Cadence, Synopsys, Mentor, Carbon, OSCI. The models have also been tested with Eve and Aldec. The models run on both Windows and Linux host platforms.
On this site you will see the scope and variety of the Fast Processor Models available and how easy they are to download and use in SystemC TLM2 simulations.
Each model is written in C using the Open Virtual Platforms (OVP) standard public APIs. They include a dedicated native C++ SystemC TLM2 interface provided as source to enable understanding and easy usage. Not only is the specific SystemC TLM2 interface provided as source (click to preview an example), also, the full model is available as open source. The models do require a simulator that implements the OVP APIs – such as OVPsim available from OVP, or commercial simulators from companies such as Imperas Software.
There is documentation that explains about the models in general (click to preview) and a specific document (click to preview an example) that describes what is available in the model, for example its ports, nets, registers, modes, exceptions, and other configuration/parameter options.
An overview document (click to preview) explains, with the use of examples, how the models are configured and used in SystemC TLM2 platforms.
The models operate just like any other SystemC TLM2 models with no inefficient co-simulation. It is very simple to create homogeneous or heterogenous platforms of advanced processor core models. To see examples of SystemC TLM2 platforms ranging from one to twenty-four cores and for platforms that boot full operating systems like Linux and Android, including SMP, visit the the examples and platforms available from the OVP TLM2 platforms download area or video area.
Many models can be instanced in one SystemC TLM2 platform, virtual platform or virtual system prototype – it is easy to build multi-core mult-processor platforms.
Each model supports standard debugging interfaces and can be connected using RSP to GDB, either standalone or within an Eclipse IDE environment.
The models run fast, hundreds of millions of instructions per second (MIPS):
To see a short video of a Fast Processor Model running in a SystemC TLM2 platform – and see it booting to the Linux prompt in under 10 seconds, click the image:
At the top of this page are several menu picks that list the different families and enable access to the model specific information. The listed items on the right provide more information.
Currently available Fast Processor Model Families.